1. Technical Field
The present invention relates to semiconductor memory devices, data storage devices, and methods for controlling a semiconductor memory device.
2. Related Art
For the purpose of providing useful information for the repair of apparatuses, data storage devices are used for collecting and storing data concerning use history, presence of errors in the use and signs of failure, operation status immediately before failure of the apparatuses. Also, data storage devices are used in aircraft black boxes, seismometers and other devices.
When an unpredicted event such as a failure or an accident occurs, data for a certain period of time preceding such an event must always be accumulated in order to keep a data log until the event occurs. When only data for a predetermined period of time immediately before the occurrence of an event needs to be accumulated, and old data preceding such a period can be successively overwritten, a memory device that is used for such purpose can be formed as a ring buffer. This memory device may be used as a first memory device, and necessary data may be transferred to a second memory device with a large capacity before old data is overwritten, whereby data up to the occurrence of an event can be stored. It is noted that Japanese Laid-open Patent Application JP-A-2005-259041 is an example of related art.
In this instance, the data must to be retained even when the apparatus stops due to a failure or other reasons, the memory device has to be formed from a nonvolatile memory. Conventionally, flash memories and EEPROMs (electrically erasable programmable read only memories) have been used as nonvolatile memories. However, since these memories have a limitation to the number of rewriting operations, their storage capacity has to be made greater, when data needs to be stored at short time intervals in order to correctly catch a change in the data.
In this connection, an increase in the storage capacity can be prevented by using ferroelectric memories that can be rewritten in a considerably greater number compared to flash memories or EEPROMs.
A ferroelectric memory is formed from memory cells each including a capacitor (ferroelectric capacitor) composed of ferroelectric material. A memory cell with 1T1C structure using a single transistor and a single capacitor and with 2T2C structure using two transistors and two capacitors are known.
Ferroelectric material is known to have a characteristic in which its state becomes stable in two polarization states in different orientations (i.e., polarization in a positive orientation and polarization in a negative orientation). A ferroelectric memory is a nonvolatile memory that stores binary data in each memory cell through associating the two polarization states of the ferroelectric capacitor to “0” and “1.”
FIG. 6 is a diagram showing hysteresis loop characteristics relating to voltages applied to a ferroelectric capacitor and polarization values (the amount of charge) of the ferroelectric capacitor.
In FIG. 6, voltages to be applied to the ferroelectric capacitor are plotted along an axis of abscissas and polarization values (the amount of charge) of the ferroelectric capacitor are plotted along an axis of ordinates. Also, it is assumed that a polarization state of the ferroelectric in a positive direction corresponds to “0,” and a polarization state of the ferroelectric in a negative direction corresponds to “1.”
The ferroelectric capacitor is in a stable state at a point A and a point C.
The point A corresponds to a state in which “0” is written to the ferroelectric capacitor, wherein the voltage applied to the ferroelectric capacitor is 0 (no voltage is applied), and the ferroelectric capacitor is polarized in a positive direction.
On the other hand, the point C corresponds to a state in which “1” is written to the ferroelectric capacitor, wherein the voltage applied to the ferroelectric capacitor is 0 (no voltage is applied), and the ferroelectric capacitor is polarized in a negative direction.
When “0” is to be written to the ferroelectric capacitor when it is in the state at the point A or in the state at the point C, a predetermined voltage in a positive direction is applied to the ferroelectric capacitor. Then the ferroelectric capacitor shifts its state from the point A or the point C to a point B. Thereafter, when the voltage applied to the ferroelectric capacitor is changed to zero, the ferroelectric capacitor changes its state from the point B to the point A, to a state in which “0” is written to the ferroelectric capacitor.
On the other hand, when “1” is to be written to the ferroelectric capacitor when it is in the state at the point A or in the state at the point C, a predetermined voltage in a negative direction is applied to the ferroelectric capacitor. Then the ferroelectric capacitor shifts its state from the point A or the point C to a point D. Thereafter, when the voltage applied to the ferroelectric capacitor is changed to zero, the ferroelectric capacitor changes its state from the point D to the point C, to a state in which “1” is written to the ferroelectric capacitor.
To read out data stored in the ferroelectric capacitor, a voltage in a positive direction is applied to the ferroelectric capacitor.
When a predetermined voltage in a positive direction is applied to the ferroelectric capacitor when it is in the state at the point A, the ferroelectric capacitor shifts its state from the point A to the point B. At this moment, because the amount of read-out charge corresponding to a difference between the amount of charge at the point B and the amount of charge at the point A is small, it is judged that “0” is read out.
On the other hand, when a predetermined voltage in a positive direction is applied to the ferroelectric capacitor when it is in the state at the point C, the ferroelectric capacitor shifts its state from the point C to the point B. At this moment, because the amount of read-out charge corresponding to a difference between the amount of charge at the point B and the amount of charge at the point C is large, it is judged that “1” is read out.
In either of the cases where the ferroelectric capacitor is in the state at the point A or in the state at the point C, the ferroelectric capacitor shifts its state to the point A, when the voltage applied to the ferroelectric capacitor is changed to zero (0) after data has been read out. In other words, in either of the cases where the data stored is “0” or “1,” data “0” is stored after readout, which is destructive data readout. Accordingly, when “1” is read out from a memory cell, “1” needs to be re-written to the same memory cell immediately after readout, if the data needs to be retained. However, when the ferroelectric memory is used as a temporary data storage device. and necessary data is periodically transferred to a memory device having a large capacity, re-writing after destructive readout is not needed as data stored in the ferroelectric memory only needs to be read out once.
When the same data is repeatedly written to a ferroelectric capacitor, or data written to a ferroelectric capacitor is stored for a long time particularly at high temperatures, the ferroelectric capacitor has a problem of imprint (burning) in which the ferroelectric capacitor is held in a polarization state in a single direction, and the ferroelectric capacitor cannot be polarized in an opposite direction.
FIGS. 7A to 7D are graphs to be used for describing a concrete circumstance in which imprint occurs in a ferroelectric capacitor.
When “0” is written to the ferroelectric capacitor, the ferroelectric capacitor is in a state at the point A, as shown in FIG. 7A. When data is read out in this state, the ferroelectric capacitor shifts its state from the point A to the point B, as shown FIG. 7B. After data is readout, the ferroelectric capacitor shifts its state from the point B to the point A, as shown in FIG. 7C. Then, when “0” is written to the ferroelectric capacitor, the ferroelectric capacitor shifts its state from the point A to the point B, as shown in FIG. 7D. Then, upon completion of writing, the ferroelectric capacitor shifts its state from the point B to the point A, thereby returning to the state shown in FIG. 7A. In other words, when writing of “0” is repeated, the ferroelectric capacitor repeats its state transition between the point A and the point B, and therefore is always in a state in which it is polarized in a positive direction. For this reason, imprint of a polarization state in a positive direction occurs, and the ferroelectric capacitor cannot be polarized in a negative direction (in other words, “1” cannot be written).
A certain measure, such as, addition of ECC (error correction code) to each data, may be implemented, to cope with occurrence of imprint in a ferroelectric memory. However, because the storage capacity needs to be increased in order to add ECC to each data, such a measure cannot be used when the storage capacity needs to be reduced as much as possible.